c++ - MakeFile in g++ . Ignorable commands -

c++ - MakeFile in g++ . Ignorable commands -

i learning how create makefile in g++. using next example codes project here.this makefile

# makefile writing create files illustration # ***************************************************** # variables command makefile operation cxx = g++ cxxflags = -wall -g # **************************************************** # targets needed bring executable date main: main.o point.o rectangle.o # ***statement : 1 $(cxx) $(cxxflags) -o main main.o point.o rectangle.o #commands underneath dependencies have tabs before them # main.o target can written more main.o: point.h rectangle.h # ***statement : 2 $(cxx) $(cxxflags) -c main.cpp point.o: point.h # ***statement : 3 rectangle.o: rectangle.h point.h # ***statement : 4

now have questions regarding have referenced specific lines using statement keyword ease of questioning.

1- understanding right of statement 1. when g++ encounters main.o (which dependency target main.o) after main: jumps target main.0 (statement 2) . checks dependency of main.o if dependency (the 2 header files found) runs command.then comes finish task next dependency , on ??

2-for dependency of point.o point.h why there no command such

$(cxx) $(cxxflags) -c point.cpp

and rectangle.o why there no command dependency such

$(cxx) $(cxxflags) -c rectangle.cpp

i appreciate if clarify this.

correct. worth noting gnu make uses modification time determine whether dependencies met.

make has implicit rules building .o targets. these utilize variables such $cxx , $cxxflags. given target, foo.o, make apply rule depending on presence of source file foo.<ext>, creating target-dependency pair foo.o : foo.<ext>. if extension c++ 1 (e.g. .cpp, .cc, .c), apply rule along lines of

$(cxx) $(cppflags) $(cxxflags) -c

you have specified extra dependency point.o. added implicit dependency point.cpp. if modification time of either point.h or point.cpp newer of point.o, rule run.

as @basile has pointed out in comments, can invoke make -p or --print-data-base options info on "state" of make, including implicit rules. using grep, example, can query implicit rules building .o files c++ files:

make -p | grep -a 1 -b 1 compile.cc

output:

# default compile.cpp = $(compile.cc) # makefile (from `makefile', line 1) -- -- # default compile.cc = $(cxx) $(cxxflags) $(cppflags) $(target_arch) -c # environment -- -- # default compile.c = $(compile.cc) # environment -- -- # commands execute (built-in): $(compile.cc) $(output_option) $< -- -- # commands execute (built-in): $(compile.cc) $(output_option) $<

concerning rule extended, point.o : point.h, version of create produce:

make -p | grep -a 1 -b 1 point .... point.o: point.cpp point.h # implicit rule search has been done. ....

c++ makefile make g++